Design Verification Engineer

Mức lương: Thỏa thuận

Đã hết hạn nộp hồ sơ - 137 lượt xem

Ngày cập nhật: 06/12/2018

Thông Tin Tuyển Dụng

Hình thức làm việc: Toàn thời gian

Chức vụ: Nhân viên

Ngành nghề: IT phần mềm, Điện tử viễn thông, IT phần cứng/mạng

Giới tính:Không yêu cầu

Bằng cấp:Chưa cập nhật

Làm việc tại:Hồ Chí Minh


Mô tả công việc

- Perform logic synthesis at sub-system or top level for multi-million gate ASIC projects
- Perform formal verification between RTL versus gate netlist and gate netlist versus gate netlist.
- Perform ECO (Engineering-Change-Order) and formal verification
- Work with logic design and PnR engineers on logic, timing, power and physical issues.
- Manage schedules and support cross-functional engineering effort.
- Responsible for timing constraints development, timing closure, and timing sign-off of sub-system and/or top level.
- Implement, enhance and maintain synthesis, and Static Timing scripts
- Contribute to the continuous development of ASIC design flow

Yêu cầu ứng viên

- Familiar with ASIC/SoC design flow
- 2-4 years of experiences working on logic synthesis/STA for multi-million-gate ASIC/SoC projects.
- Experiences in commercial implementation tools for logic synthesis (DC, Genus), formal verification (LEC, Formality), STA (PrimeTime, Tempus)
- Knowledge of Verilog and/or VHDL, and experience with simulators and waveform debugging tools.
- Knowledge of area, speed, power optimizations during logic synthesis
- Experience in TCL scripts, timing constraint development and timing constraint debug.
- Experience in Conformal ECO flow, PnR tools is a plus
- Experience in PPA analysis, RTL coding style for synthesis, physical-aware synthesis is a plus
- Knowledge of industry standards DFT and design tools is a plus
- Self-motivated and excited to learn new skills, tools, IP, and design flows
- Good written and oral communication skills in English
- Start working date: as soon as possible

** Benefits
- Private Healthcare Insurance for Employee and Family
- Lunch allowance, free drinks and snacks
- Competitive compensation and benefit package based on experience and competence
- Attractive performance bonus

All interested candidates are invited to send CV, motivation letter in English and the latest transcript to our HR department.

Quyền lợi được hưởng

- Competitive compensation and benefit package based on experience and competence
- Private Healthcare Insurance for Employee and Family
- Lunch allowance, free drinks and snacks

Cách thức ứng tuyển

Hồ sơ theo yêu cầu của nhà tuyển dụng khi liên hệ trực tiếp

Giới thiệu về công ty

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CÔNG TY TNHH CÔNG NGHỆ MARVELL VIỆT NAM
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Founded in 1995, Marvell Technology Group Ltd. has operations worldwide and approximately 7,000 employees. Marvell’s U.S. operating subsidiary is based in Santa Clara, California and Marvell has international design centers located in the U.S., Europe, Israel, India, Singapore and China. A leading fabless semiconductor company, Marvell ships over one billion chips a year. Marvell’s expertise in microprocessor architecture and digital signal processing drives multiple platforms including high volume storage solutions, mobile and wireless, networking, consumer, and green products. World-class engineering and mixed-signal design expertise helps Marvell deliver critical building blocks to its customers, giving them the competitive edge to succeed in today’s dynamic market. Marvell has set up a new entity in Vietnam (Marvell Technology Vietnam LLC) and we are looking for talented and passionate graduates to join us. If you want to make use of your engineering background in creating exciting electronic products, then we want to talk with you. Interested candidates, please e-mail your resume, educational qualifications and transcripts with contact numbers, as well as current and expected salaries to Marvell Vietnam HR Department Ẩn chi tiết
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CÔNG TY TNHH CÔNG NGHỆ MARVELL VIỆT NAM

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Địa chỉ: Lầu 5, Tòa nhà B, Khu Nhà Xưởng Văn Phòng, Lô D.01, Đường Tân Thuận, Khu Chế Xuất Tân Thuận, Phường Tân Thuận Đông, Quận 7, Thành Phố Hồ Chí Minh

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Design Verification Engineer

Mức lương: Thỏa thuận | Hạn nộp hồ sơ: Đã hết hạn nộp hồ sơ